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DISCRETE SEMICONDUCTORS
DATA SHEET
dbook, halfpage
M3D379
BLF1049 Base station LDMOS transistor
Product specification Supersedes data of 2001 Dec 05 2003 May 14
Philips Semiconductors
Product specification
Base station LDMOS transistor
FEATURES * Typical performance at a supply voltage of 27 V: - 1-tone CW; IDQ = 1000 mA - Output power = 125 W - Gain = 16.5 dB - Efficiency = 54% - EDGE output power = 45 W (AV) - ACPR400 = -64 dBc at 400 kHz (EDGE; IDQ = 750 mA) - EVM = 2% rms (AV) (EDGE; IDQ = 750 mA) * Easy power control * Excellent ruggedness * High power gain * Excellent thermal stability * Designed for broadband operation (800 to 1000 MHz) * Internally matched for ease of use. APPLICATIONS * RF power amplifier for GSM, EDGE and CDMA base stations and multicarrier applications in the 800 to 1000 MHz frequency range. QUICK REFERENCE DATA Typical RF performance at Th = 25 C in a common source test circuit. MODE OF OPERATION 2-tone 1-tone CW GSM EDGE 920 f (MHz) PL (W) 125 (PEP) 125 45 (AV) Gp (dB) 15.5 16.5 15 D (%) 37 54 32 d3 (dBc) -32 - -
Top view 2 3
handbook, halfpage
BLF1049
DESCRIPTION 125 W LDMOS power transistor for base station applications at frequencies from 800 MHz to 1000 MHz. PINNING - SOT502A PIN 1 2 3 drain gate source; connected to flange DESCRIPTION
1
MBK394
Fig.1 Simplified outline SOT502A .
ACPR 400 (dBc) - - -64
EVM % rms (AV) - - 2
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134). SYMBOL VDS VGS Tstg Tj drain-source voltage gate-source voltage storage temperature junction temperature PARAMETER - - -65 - MIN. 75 15 150 200 MAX. V V C C UNIT
2003 May 14
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Philips Semiconductors
Product specification
Base station LDMOS transistor
THERMAL CHARACTERISTICS SYMBOL Rth j-c Rth j-h Notes 1. Thermal resistance is determined under RF operating conditions. 2. Depending on mounting condition in application. CHARACTERISTICS Tj = 25 C unless otherwise specified. SYMBOL V(BR)DSS VGSth IDSS IDSX IGSS gfs RDSon PARAMETER drain-source breakdown voltage gate-source threshold voltage drain-source leakage current on-state drain current gate leakage current forward transconductance drain-source on-state resistance CONDITIONS VGS = 0; ID = 3 mA VDS = 10 V; ID = 300 mA VGS = 0; VDS = 36 V VGS = VGSth + 9 V; VDS = 10 V VGS = 20 V; VDS = 0 VDS = 10 V; ID = 10 A VGS = 9 V; ID = 10 A MIN. 75 4 - 45 - - - TYP. - - - - - 9 60 PARAMETER thermal resistance from junction to case thermal resistance from junction to heatsink CONDITIONS Th = 25 C, PL = 35 W (AV), note 1 Th = 25 C, PL = 35 W (AV), note 2
BLF1049
VALUE 0.42 0.62
UNIT K/W K/W
MAX. - 5 3 - 1 - -
UNIT V V A A A S m
APPLICATION INFORMATION RF performance in a common source class-AB circuit; VDS = 27 V; Th = 25 C; unless otherwise specified. Mode of operation: 2-tone CW, 100 kHz spacing; IDQ = 1130 mA; f = 890 MHz SYMBOL Gp D IRL d3 PARAMETER gain power drain efficiency input return loss third order inter modulation distortion CONDITIONS PL = 125 W (PEP) MIN. 14.6 33 - - TYP. 15.5 37 -12 -32 MAX. - - -6 -25 UNIT dB % dB dBc
Mode of operation: GSM EDGE; IDQ = 750 mA; f = 920 MHz SYMBOL Gp D ACPR 400 EVM (AV) EVM peak PARAMETER gain power drain efficiency adjacent channel power ratio EVM rms average signal distortion EVM rms peak signal distortion CONDITIONS PL = 45 W (AV) MIN. - - - - - TYP. 15 32 -64 2 2.2 MAX. - - - - - UNIT dB % dBc % %
Mode of operation: 1-tone CW; IDQ = 1000 mA; f = 920 MHz SYMBOL Gp D PARAMETER gain power drain efficiency CONDITIONS PL = PL 1 dB = 125 W MIN. - - TYP. 16.5 54 MAX. - - UNIT dB %
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Philips Semiconductors
Product specification
Base station LDMOS transistor
BLF1049
handbook, halfpage
16
MLE061
40 D (%) 30 D
handbook, halfpage
Gp (dB) 15
Gp
-62 ACPR 400 (dBc) -64
MLE062
2 EVMrms (AV) (%) 1.5 EVM
14
20
-66 ACPR400 -68
1
13
10
0.5
12 0 10 20 30
0 50 40 PL (AV)(W)
-70
0 0 10 20 30 40 50 PL (AV)(W)
VDS = 27 V; f = 920 MHz; IDQ = 750 mA; Th 25 C. VDS = 27 V; f = 920 MHz; IDQ = 750 mA; Th 25 C.
Fig.3 Fig.2 GSM EDGE power gain and efficiency as functions of load power; typical values.
GSM EDGE ACPR400 and EVM as functions of average load power; typical values.
handbook, halfpage
50
MLE064
17 gain (dB) 16.5
handbook, halfpage
18
MLE063
(4)
60 D (%)
(%) 40
Gp (dB) 17
D
(1,2,3)
16 30
(5)
40 Gp 20
15.5
15
(6)
16
20
10
14.5
0 0 15 0 50 100 PL (AV) (W) 0 150 50
14 100 150 PL (PEP) (W)
VDS = 27 V; IDQ = 1.1 A; f1 = 920.0 MHz; f2 = 920.1 MHz. (1) at Th = -40 C. (2) at Th = 20 C. (3) at Th = 80 C. (4) gain at Th = -40 C. (5) gain at Th = 20 C. (6) gain at Th = 80 C.
VDS = 27 V; f = 920 MHz; IDQ = 1000 mA;
Fig.5 Fig.4 1-tone CW power gain and efficiency as functions of load power; typical values.
2-tone power gain and efficiency as functions of load power at different temperatures.
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Philips Semiconductors
Product specification
Base station LDMOS transistor
BLF1049
handbook, halfpage
-20
MLE065
handbook, halfpage
-30
MLE066
d3 (dBc) -30
d5 (dBc)
(3)
-40
(1)
(2)
-40
-50
(1)
-50
(2) (3)
-60
-60
0
50
100 150 PL (PEP) (W)
-70
0
50
100 150 PL (PEP) (W)
VDS = 27 V; IDQ = 1.1 A; f1 = 920.0 MHz; f2 = 920.1 MHz. (1) Th = -40 C. (2) Th = 20 C. (3) Th = 80 C.
VDS = 27 V; IDQ = 1.1 A; f1 = 920.0 MHz; f2 = 920.1 MHz. (1) Th = -40 C. (2) Th = 20 C. (3) Th = 80 C.
Fig.6
Third order intermodulation distortion as a function of load power at different temperatures.
Fig.7
Fifth order intermodulation distortion as a function of load power at different temperatures.
handbook, halfpage
-40
MLE067
handbook, halfpage
(3) (2)
20
MLE068
40
d7 (dBc) -50
gain (dB) 15
(2) (1)
D (%)
30
(1) (3)
10
(4)
20
-60 5 10
-70 0 50 100 150 PL (PEP) (W)
0 0 50 100
0 150 PL (PEP) (W)
VDS = 27 V; IDQ = 1.1 A; f1 = 920.0 MHz; (1) Th = -40 C. (2) Th = 20 C. (3) Th = 80 C.
VDS = 27 V; f1 = 920.0 MHz; f2 = 920.1 MHz. (1) IDQ = 1 A. (2) IDQ = 1.45 A. (3) IDQ = 1 A. (4) IDQ = 1.45 A.
Fig.8
Seventh order intermodulation distortion as a function of load power at different temperatures.
Fig.9
Power gain and drain efficiency as functions of peak envelope load power; typical values.
2003 May 14
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Philips Semiconductors
Product specification
Base station LDMOS transistor
BLF1049
handbook, halfpage
0
MLE069
handbook, halfpage Z
2
MLE070
dim (dBc) -20
i () 1.5
ri 1
(1) (2) (5)
-40
(4)
0.5
-60
(6) (3)
0 xi -0.5
-80
0
50
100 150 PL (PEP) (W)
-1 0.85
0.9
0.95
f (GHz)
1
VDS = 27 V; f1 = 920.0 MHz; f2 = 920.1 MHz. (1) d3; IDQ = 1 A. (2) d5; IDQ = 1 A. (3) d7; IDQ = 1 A. (4) d3; IDQ = 1.3 A. (5) d5; IDQ = 1.3 A. (6) d7; IDQ = 1.3 A. Class-AB operation; VDS = 27 V; IDQ = 1125 mA; PL = 35 W. Values comprised for different parameters.
Fig.10 Intermodulation distortion as a function of peak envelope load power; typical values.
Fig.11 Input impedance as a function of frequency (series components); typical values.
handbook, halfpage Z
2
MLE071
L () 1.5
1
RL
0.5
handbook, halfpage
0 -0.5 XL
drain ZL gate Z IN
MGS998
-1 0.85
0.9
0.95
f (GHz)
1
Class-AB operation; VDS = 27 V; IDQ = 1125 mA; PL = 35 W. Values comprised for different parameters.
Fig.12 Input impedance as a function of frequency (series components); typical values.
Fig.13 Definition of transistor impedance.
2003 May 14
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Philips Semiconductors
Product specification
Base station LDMOS transistor
BLF1049
handbook, full pagewidth
C2 Vbias
Q1
C3 C4 C6 L9 R1 C7 L5 L10
C15 L12
C17 C9 Vsupply C10
L3 RF in L1 C1 L2 L4 C5 L6
L7
Q2
L11 L14 C13 C18 C11 C12 L13 C16 L15 L16 RF out
L8 C8
C14
MDB168
Fig.14 Test circuit for 860 to 900 MHz.
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Philips Semiconductors
Product specification
Base station LDMOS transistor
BLF1049
handbook, full pagewidth
PHILIPS
Input Rev C Vbias in C2 Q1 C4 C6
PHILIPS
Output Rev C L12 L9 C9 C15 C17
C3 R1 L1 C1 L2 L4 L5 C5 C10
Vd in C18
BLF1049
L3 L6
C7 L7 L8 C8
L14 L10 L11 C13 L15 L16
C11 C12 C16 C14
L13
PHILIPS
Input Rev C
PHILIPS
Output Rev C
60
60
40
40
MLE073
Dimensions in mm. The components are situated on one side of the copper-clad Rogers 6006 printed-circuit board (r = 6.15); thickness = 25 mm. The other side is unetched and serves as a ground plane.
Fig.15 Component layout for 860 to 900 MHz test circuit.
2003 May 14
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Philips Semiconductors
Product specification
Base station LDMOS transistor
List of components (see Figs 14 and 15) COMPONENT C1, C6, C13, C14, C15, C16, C17 C2 C3 C4, C9, C10, C11, C12 C5, C18 C7, C8 R1 Q1 Q2 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12, L13 L14 L15, L16 Notes 1. American Technical Ceramics type 100A or capacitor of same quality. DESCRIPTION multilayer ceramic chip capacitor; note 1 multilayer ceramic chip capacitor; note 1 multilayer ceramic chip capacitor; note 1 tantalum capacitor air trimmer capacitor multilayer ceramic chip capacitor potentiometer 7808 voltage regulator BLF1049 LDMOS transistor stripline; note 2 stripline; note 2 stripline; note 2 stripline; note 2 ferroxcube stripline; note 2 stripline; note 2 stripline; note 2 stripline; note 2 stripline; note 2 stripline; note 2 stripline; note 2 stripline; note 2 stripline; note 2 VALUE 68 pF 330 nF 100 nF 10 F 5 pF 8.2 pF 1 k
BLF1049
DIMENSIONS
5.22 x 0.92 mm 6.47 x 0.92 mm 5.38 x 4.8 mm 2.4 x 0.92 mm 9.73 x 0.92 mm 1.82 x 9.3 mm 8.15 x 17.9 mm 44 x 0.92 mm 18.45 x 28.3 mm 9.95 x 5.38 mm 37.6 x 3.35 mm 2.36 x 0.92 mm 4.22 x 0.92 mm
2. The striplines are on a double copper-clad Rogers 6006 printed-circuit board (r = 6.15); thickness = 0.64 mm.
2003 May 14
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Philips Semiconductors
Product specification
Base station LDMOS transistor
PACKAGE OUTLINE Flanged LDMOST ceramic package; 2 mounting holes; 2 leads
BLF1049
SOT502A
D
A
3
D1
F
U1 q C
B c
1
L
H
U2
p w1 M A M B M
E1
E
A
2
b w2 M C M Q
0
5 scale
10 mm
DIMENSIONS (millimetre dimensions are derived from the original inch dimensions) UNIT mm inches A 4.72 3.43 0.186 0.135 b 12.83 12.57 c 0.15 0.08 D D1 E 9.50 9.30 E1 9.53 9.25 F 1.14 0.89 H 19.94 18.92 L 5.33 4.32 p 3.38 3.12 Q 1.70 1.45 q 27.94 U1 34.16 33.91 1.345 1.335 U2 9.91 9.65 0.390 0.380 w1 0.25 0.01 w2 0.51 0.02
20.02 19.96 19.61 19.66 0.788 0.786 0.772 0.774
0.505 0.006 0.495 0.003
0.374 0.375 0.366 0.364
0.045 0.785 0.035 0.745
0.210 0.133 0.170 0.123
0.067 1.100 0.057
OUTLINE VERSION SOT502A
REFERENCES IEC JEDEC JEITA
EUROPEAN PROJECTION
ISSUE DATE 99-12-28 03-01-10
2003 May 14
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Philips Semiconductors
Product specification
Base station LDMOS transistor
DATA SHEET STATUS LEVEL I DATA SHEET STATUS(1) Objective data PRODUCT STATUS(2)(3) Development DEFINITION
BLF1049
This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN).
II
Preliminary data Qualification
III
Product data
Production
Notes 1. Please consult the most recently issued data sheet before initiating or completing a design. 2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. 3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. DEFINITIONS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. DISCLAIMERS Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes Philips Semiconductors reserves the right to make changes in the products including circuits, standard cells, and/or software described or contained herein in order to improve design and/or performance. When the product is in full production (status `Production'), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
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Philips Semiconductors - a worldwide company
Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
(c) Koninklijke Philips Electronics N.V. 2003
SCA75
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
613524/03/pp12
Date of release: 2003
May 14
Document order number:
9397 750 11123

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